loudorren
Well-known Member
Hello Quadrophoners,
Kristian,
The bypass caps around the regulators on the ANRS pages were accidentally ommited. Thanks for observation. The final number of OpAmp bypass caps will be determined shortly by test. I will update the schematics then. By the way, the schematics that come with the units will be fully annotated.
Good guess on the ANRS chip, unfortunately incorrect. The CDC timer chip is a 74HCT4060 for better edge times. There is no 4000 or DG analog switches. Distortions on them are just not low enough. Unused inputs on these analog switches do not need to be terminated. A resistor is missing on the cart select pin that is diode isolated from the bias control. I will update that. Pull up and down level are supplied by the binary control switches that will be used so there will be no floating logic.
Plus and Minus 20 Volts DC is great! Filters are custom programmed. 565s are still made by 4 manufactures but these PLLs are not 565s.
To get the best sum and difference matrixing, I am using a .1% matching tolerance resistor network. There are a fair amount of voltage regulators in this system. They serve the purpose of reducing and isolating power suppy line noise.
Anyway, Kristian, Nice evaluation and thanks for pointing out schematic omissions. Drawing things this complex always leads to errors and I am using a completely new schematic capture program which is the best I have found, but I am still getting use to it.
Lou Dorren
Kristian,
The bypass caps around the regulators on the ANRS pages were accidentally ommited. Thanks for observation. The final number of OpAmp bypass caps will be determined shortly by test. I will update the schematics then. By the way, the schematics that come with the units will be fully annotated.
Good guess on the ANRS chip, unfortunately incorrect. The CDC timer chip is a 74HCT4060 for better edge times. There is no 4000 or DG analog switches. Distortions on them are just not low enough. Unused inputs on these analog switches do not need to be terminated. A resistor is missing on the cart select pin that is diode isolated from the bias control. I will update that. Pull up and down level are supplied by the binary control switches that will be used so there will be no floating logic.
Plus and Minus 20 Volts DC is great! Filters are custom programmed. 565s are still made by 4 manufactures but these PLLs are not 565s.
To get the best sum and difference matrixing, I am using a .1% matching tolerance resistor network. There are a fair amount of voltage regulators in this system. They serve the purpose of reducing and isolating power suppy line noise.
Anyway, Kristian, Nice evaluation and thanks for pointing out schematic omissions. Drawing things this complex always leads to errors and I am using a completely new schematic capture program which is the best I have found, but I am still getting use to it.
Lou Dorren